Bumping is a necessity for wafer yield testing of advanced front-end IC manufacturing technologies, and the basis for the 3D wafer level packaging technology development. With the rapid growth of mobile market in China, and increasing adoption of advanced 40nm and 28nm process technologies, IC chips and their demand for bumping are anticipated to grow rapidly in the next few years

 

By establishing Bumping and nearby advanced flip-chip packaging capabilities, along with SMIC's front-end 28nm process technology offerings, the first complete 12" advanced IC manufacturing local supply chain in China will be formed. This supply chain can greatly reduce the cycle time between FEOL (Front-end of Line) and MEOL (Middle-end of Line) / BEOL (Back-end of Line), and effectively control the intermediate costs. More importantly, it is closer to the end market in China, therefore it can shorten the time to market for fabless customers while focusing on China's mobile market. 

 

Using this as a foundation, both sides will also strengthen the co-operation in the 3D wafer level packaging field.  

 

"Collaborating with China's largest packaging service provider meets SMIC's long-term strategy of cultivating China's IC ecosystem," said Dr. Tzu-Yin Chiu, Chief Executive Officer & Executive Director of SMIC. "By jointly cooperating in the bumping line and having JCET's advanced package process next door, we will be able to provide an one-stop-shop service with mutual benefits, and establish the first 12" advanced IC manufacturing local supply chain in China. It is a strategic and necessary step for SMIC to take to provide more value-added services to customers."

 

"In combination with SMIC's strong capabilities of front-end wafer manufacturing and technology R&D, and JCET's experience in core semiconductor packaging technologies, this joint venture has complementary advantages for both sides," said Mr. Wang Xinchao, Chairman of JCET. "Together, we will devote our efforts to build a supply chain which is the most suitable for meeting customers' requirements, and to elevate and enhance the level and competitiveness of China's IC manufacturing eco-system."

 

About JCET

 

As a well-known semiconductor assembly and testing company and the chairman member of the strategic alliance of IC industrial chain technological innovation, Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET) was established in 1972, with a registered capital of USD139 million , and total assets of USD1.3billion. In 2003, JCET is listed in the A-Share Section on Shanghai Stock Exchange, which is the first listed company in the semi-conductor assembly and testing industry in Mainland China. In 2012 JCET was ranked as NO.7 Company in the global semiconductor assembly and testing industry with a sales volume of 714 million USD (NO.1 in Mainland China).

 

JCET enjoys more than 600 domestic and foreign patents, of which about 40% are invention patents, and took the lead into the TSV, RF-SiP and 3D-RDL, copper pillar bump, HD-FCBGA and 25μm thickness chips stacking, MEMS, MIS and PoP - nine major fields of international IC technology and realized the mass production of the MIS, WL-CSP and SiP, CPB and flip-chip products.

 

About SMIC

 

Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 981) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in mainland China. SMIC provides integrated circuit (IC) foundry and technology services at 0.35-micron to 40-nanometer and begins to offer advanced 28nm process technology. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and a 200mm mega-fab in Shanghai, a 300mm mega-fab in Beijing, a 200mm fab in Tianjin, and a 200mm fab project under development in Shenzhen. SMIC also has customer service and marketing offices in the U.S., Europe, Japan, and Taiwan, and a representative office in Hong Kong. For more information, please visit www.smics.com.



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