Tel Aviv, Israel – April 29, 2013 –  Aldec Israel will demonstrate its innovative functional verification platform and hardware emulation solutions at ChipEx2013 in Tel Aviv, Israel.

“With its consistent focus on bringing the latest technological innovations to the Israeli microelectronics industry, ChipEx continues to serve as an important platform for us each year,” said Tomer Kabakov, Aldec Israel Sales Manager, “The theme for this year’s event, ‘Improved Productivity’, resonates with us as Aldec tools are consistently deliver here, often outperforming the competition.”

Advanced Verification 

Aldec’s functional verification platform, Riviera-PRO™, delivers solutions to the toughest verification challenges. Demonstrations will showcase the innovative tool suite, including requirement-driven design, simulation, and debugging for mixed-language and mixed-signal SoC and large-scale FPGA designs.

HW/SW Validation Platform 

HES-DVM™ is a fully automated and scriptable Hybrid Verification and Validation environment for SoC and ASIC designs up to 96M ASIC gates capable of bit-level simulation acceleration, SCE-MI 2.1 transaction emulation, hardware prototyping, and virtual modeling.

Free UVM and Assertions Online Training 

Aldec invites visitors to ChipEx to tour Fast Track™ ONLINE, a convenient, online training portal that is available at no cost to the design verification community. Current training courses include Fast Track™ to UVM and Fast Track™ to Assertions.

About ChipEx

ChipEx2013 is produced by TapeOut magazine and Chiportal in cooperation with The Israel Export & International Cooperation Institute. ChipEx is designed for research and development engineers, project leaders, and managers in the microelectronics industry, defense electronic and electro-optic systems, fabless and multinational chip design centers as well as university personnel and students.  www.chipex.co.il  

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions.  www.aldec.com

Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners.