"We would like to recognize the contributors of the SystemC Language and Verification Working Groups that made these new libraries possible. To ensure high quality, both libraries have been thoroughly reviewed and tested," said Philipp A. Hartmann, chair of the SystemC Language Working Group and Jerome Cornet, chair of the SystemC Verification Working Group.
SystemC 2.3.1 is a maintenance release that incorporates over 200 individual changes addressing issues and errata that have been reported during the past 18 months. The accompanying regression test suite covers bug fixes as well as additional features. Changes include:
- Fixes for IEEE Std. 1666-2011 incompatibilities in the process-control support as well as the Transaction-Level Model (TLM-2.0) convenience socket's blocking/non-blocking conversions;
- Improved time conversion and language support for quantum calculation;
- Additional utility functions for the object hierarchy and report handling;
- 64-bit support (including Microsoft Windows);
- Extensions to signal initialization and bit-vector conversions
- Reworked build system, supporting additional compilers and platforms and providing more flexible control of the library installation.
The release also includes experimental features proposed by the Language Working Group that are not yet included in IEEE Std. 1666-2011. Users can optionally activate these features during library configuration to enable testing by early adopters. Most notably, these enhancements support extended simulation phase callbacks to enable the non-invasive inclusion of custom introspection extensions and are needed for advanced verification methodologies. More information can be found in the companion release notes.
SCV 2.0 contains an implementation of the verification extensions for SystemC. A significant effort has been undertaken to ensure backwards compatibility with the previous version while improving the code quality and extending the platform and compiler support. Changes include:
- Compatible with IEEE Std. 1666-2011 through Accellera SystemC 2.3.1;
- Additional support of Accellera SystemC 2.3.0 and 2.2.0;
- 64-bit support (including Microsoft Windows);
- Recent compiler support (Visual C++ 2008-2013, GCC up to 4.9, Clang);
- Modern OS support (Windows 7, recent Linux versions (RHEL, Debian, Ubuntu), OS
- Numerous bug fixes and quality improvements.
For both libraries, the notes and readme files have been updated to support installation on the latest operating systems and compilers. For the first time, both the SystemC and SCV libraries now support native 64-bit compilers on Microsoft Windows platforms.
"SCV 2.0 brings support for the latest development environments following renewed interest in verification with SystemC," said Jerome Cornet, chair of the SystemC Verification Working Group. "This release paves the way for enabling strong capabilities required by initiatives such as UVM™ (Universal Verification Methodologies) and the multi-language verification standard currently being developed by Accellera.
The IEEE Std. 1666-2011 standard may be obtained at no charge via the Accellera Systems Initiative-sponsored IEEE Get Program. The newly released versions 2.3.1 of the open source proof-of-concept SystemC library (and the corresponding regression suite) and SCV 2.0 library are available under the SystemC open source license and may be downloaded free of charge on the Accellera website.
About the Accellera SystemC Language and Verification Working Groups
Accellera's SystemC Language Working Group (SystemC LWG) and SystemC Verification Working Group (SystemC VWG) are two of the fourteen Accellera Working Groups that produce effective and efficient Electronic Design Automation (EDA) and Intellectual Property (IP) standards for today's advanced IC designs and embedded systems. The SystemC LWG is responsible for the definition and development of the SystemC and TLM core languages, the foundation on which all other SystemC libraries and functionality are built. The SystemC VWG is defining verification extensions to the SystemC language standard as well as enriching the SystemC reference implementation by offering an add-on SystemC Verification (SCV) library to ease the deployment of a verification methodology based on SystemC. Participants of both working groups include member companies and industry contributors. Technical contributors typically have many years of practical experience with IC and system design as well as developing and using EDA tools. For more information about the SystemC LWG, please click here. More information about the SystemC VWG can be found here.
About Accellera Systems Initiative
Accellera Systems Initiative (Accellera) is an independent, not-for profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. The organization accelerates the development of standards that increase designer productivity and lower the cost of product development. As part of its ongoing partnership with the IEEE, standards developed by Accellera are contributed to the IEEE Standards Association for formal standardization and ongoing governance. For more information, visit www.accellera.org. For membership information, click here.
Accellera, Accellera Systems Initiative, SystemC and UVM are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.
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For more information, contact: Jill Jacobs Public Relations for Accellera Systems Initiative Phone: +1 408 505 6017 Email: Email Contact