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DVCon Europe 2015 announces its Preliminary Technical Program Registration discount applies until October 1st, 2015

Sep 28, 2015 -- The Design and Verification Conference (DVCon) & Exhibition Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design & verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.

The conference will be held on Wednesday November 11th and Thursday November 12th, 2015 at the Holiday Inn Munich City Center, Hochstrasse 3, 81669 Munich, Germany.

Early bird registration discount is available through October 1st, 2015. Register today at: www.dvcon-europe.org/registration. Click here for Special hotel rates for attendees.

The Preliminary Technical Program is now available, covering the following themes:

DVCon Europe has selected high quality papers, tutorials and posters around best practices and user experiences on design and verification in SystemC, SystemVerilog, PSL, UVM, UPF, IP-XACT, and more.

The Highlights of DVCon Europe 2015 are:

ACCELLERA GLOBAL SPONSORS: ARM, Cadence, Intel, Mentor Graphics, Synopsys