Program packed with four days of in-depth technical material
Louisville, CO – February 23, 2016 – The 2016 Design and Verification Conference and Exhibition U.S. ( DVCon U.S.) begins next week, offering the industry’s most comprehensive technical program focused on the design and verification of electronics systems. Sponsored by Accellera Systems Initiative, DVCon U.S. will be held February 29-March 3 at the DoubleTree Hotel in San Jose, California.
“Attendees have come to expect an in-depth, very comprehensive technical program from DVCon U.S. and this year will not disappoint,” stated Ambar Sarkar, program chair. “We have added some new sessions to the program this year such as a design for testing, and emulation. Mixed-signal and low power continue their popularity in the program and we continue to offer our ever popular sessions on UVM, advanced design and modeling approaches, improving verification processes and management, and formal methods. There’s something valuable for everyone.”
“Design and verification engineers attending DVCon U.S. 2016 will not only have access to unrivaled technical content throughout the 4-day program, but they will also be able to interact with some of the best and brightest experts in the industry,” commented Yatin Trivedi, DVCon U.S. general chair. “We have found that while the technical program content is of utmost importance to attendees, the opportunity to engage with industry gurus and talk with peers and exhibitors about issues they face in their day-to-day jobs, is also extremely valuable.”
The conference opens with Accellera Day on Monday, February 29th. The day-long event will run from 9:00am-5:00pm and will feature in-depth tutorials on thelatest EDA and IP standards being developed and implemented by today’s leading electronics companies. There will also be an Accellera-sponsored luncheon from 12:00-1:30 that will honor the 2016 Technical Excellence Award recipient and will also give an update on the Portable Stimulus Working Group activities.
Throughout the conference there will be 12 tutorials, 13 papers, and 36 posters being presented. There will also be 2 panel discussions on Wednesday, March 2 in the Oak/Fir Ballroom, with the first, “Redefining ESL” beginning at 8:30amand the second, “Emulation + Static Verification Will Replace Simulation” beginning at 1:30pm.
The DVCon Expo will be open for three afternoons: Monday, February 29 from5:00-7:00pm, including a sponsored booth crawl; Tuesday, March 1 and Wednesday, March 2 from 2:30-6:00pm, with a reception both nights from 5:00-6:00pm.
For the complete DVCon U.S. 2016 schedule, including a list of sessions, tutorials and sponsored luncheons and events, visit www.dvcon.org. To register, visit here.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, in addition to DVCon U.S., Accellera also sponsors
DVCon Europe and
DVCon India. For more information about Accellera, please visit
www.accellera.org. For more information about DVCon U.S., please visit
www.dvcon.org. Follow DVCon on Facebook
https://www.facebook.com/DVConor @dvcon_us on Twitter or to comment, please use #dvcon_us.
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