Barefoot Networks benchmarked the different emulators available, and after a careful and lengthy evaluation, decided the Veloce platform was the only emulator able to handle the large and complex Barefoot Networks design.
"The Veloce emulation platform gave us the capacity we needed to verify our programmable, networking-specific and interconnect-dominated design," said Dan Lenoski, VP of Engineering, Barefoot Networks. "Beyond the fundamental strengths of the Veloce emulation platform, we were also able to take advantage of their proven hardware+software co-emulation, which is critical for verifying a programmable networking device."
In the networking space, Ethernet designs are large and particularly intricate, and can tax emulation compile and run times. The Barefoot's Tofino switch design consists of complex interconnect, which typically creates a challenge for most emulation platforms to route. The Veloce emulation platform uses patented virtual wire technology and the proprietary Crystal2 chip, and had no issue handling the complexity of this interconnect-dominated design.
In addition, the Veloce VirtuaLAB Ethernet used by Barefoot was critical for testing the core functionality of the design. VirtuaLAB includes an Ethernet Packet Generator and Monitor (EPGM) that generates, transmits and monitors Ethernet packets with the Design under Test (DUT); Ethernet testers are modeled in software running under Linux on a workstation connected to the emulator.
"The Veloce emulation platform continues to dominate in the networking market," said Eric Selosse, vice president and general manager of the Mentor Emulation Division. "We worked with Barefoot on access and implementation so they could focus immediately and exclusively on the verification task."
About the Veloce Emulation platform
The Veloce emulation platform uses innovative software, running on powerful, qualified hardware and an extensible operating system, to target design risks faster than hardware-centric strategies. Now considered among the most versatile and powerful of verification tools, emulation greatly expands the ability of project teams to do hardware debugging, hardware/software co-verification or integration, system-level prototyping, low-power verification and power estimation and performance characterization.
The Veloce emulation platform is a core technology in the Mentor® Enterprise Verification Platform™ (EVP) – a platform that boosts productivity in ASIC and SoC functional verification by combining advanced verification technologies in a comprehensive platform. The Mentor EVP combines Questa® advanced verification solutions, the Veloce emulation platform, and the Visualizer™ debug environment into a globally accessible, high-performance, datacenter resource. The Mentor EVP features global resource management that supports project teams around the world, maximizing both user productivity and total verification return on investment.
About Mentor Graphics
Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of approximately $1.18 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
http://www.mentor.com.
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