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Media Alert: Rambus to Demonstrate High-Performance IP Cores for Networking and Data Center at TSMC OIP Ecosystem Forum

(BUSINESS WIRE) — September 12, 2017 — Rambus Inc. (NASDAQ: RMBS):

What:

    TSMC Open Innovation Platform (OIP) Ecosystem Forum
 

Who:

Rambus Inc. (Nasdaq: RMBS)

 

Where:

Booth 916
Santa Clara Convention Center
5001 Great America Parkway
Halls C and D
Santa Clara, Calif. 95054
 

When:

Wednesday, Sept. 13, 2017
 

Rambus will be demonstrating its high-speed SerDes IP Cores at the TSMC Open Innovation Platform (OIP) Ecosystem forum this week in Santa Clara, Calif.

Additional details

Rambus Multi-protocol SerDes PHY

Visit Rambus at Booth 916 to learn more.

About Rambus Memory and Interfaces Division

The Rambus Memory and Interfaces Division develops products and services that solve the power, performance, and capacity challenges of the communications and data center computing markets. Rambus enhanced standards-compatible and custom memory and serial link solutions include chips, architectures, memory and SerDes interfaces, IP validation tools, and system and IC design services. Developed through our system-aware design methodology, Rambus products deliver improved time-to-market and first-time-right quality.

About Rambus Inc.

Rambus creates innovative hardware and software technologies, driving advancements from the data center to the mobile edge. Our chips, customizable IP cores, architecture licenses, tools, software, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile payments, and smart ticketing. At Rambus, we are makers of better. For more information, visit  rambus.com.



Contact:

SHIFT Communications
Leslie Clavin, 415-591-8440
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