VHDL 2019 Webinar Series, Part 1: Interfaces, Conditional Analysis, File IO, and The New Environment
Presenter: Jim Lewis, VHDL User, Designer, Verification Engineer, Trainer, OSVVM developer, and IEEE VHDL Chair
Thursday, April 22nd, 2021
Abstract:
LIVE WEBINAR: VHDL-2019: Just the New Stuff Part 1: Interfaces, Conditional Analysis, File IO, and The New Environment 9:12 AM
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