Santa Clara, CA. — November 22, 2021— Mirabilis Design Inc., the leading provider of system-level Intellectual Property and Simulation Solutions for electronics and processors, announced today the release of VisualSim AI Processor Designer. VisualSim AI accelerates time-to-market of new AI technology, eliminates under-design and over-design, and provides a configuration platform for end-users. VisualSim can be used for the design of AI processors, partition AI algorithms on a System-on-Chip (SoC), and test the performance of an AI processor in automotive, medical, and data center applications.
VisualSim AI contains configurable, source-code provided Intellectual Property for processor cores, custom AI designer, task partitioning utilities, cache, memory, storage, peripherals, interfaces, neural nodes and interconnect. The associated Insight Engine quickly detects the source of bottlenecks, performance limitations and higher power consumption in an AI SoC architecture. The platform also integrates into the FPGA verification and early software development.
“The efficacy of a processor configuration is very hard to predict before building the first prototype. The intense competition in the marketplace makes this sheer delay in detecting performance limitation, a major detriment to new product introduction”, says Deepak Shankar, Vice President – Technology, at Mirabilis Design Inc. “The growing complexity made us construct a solution from scratch that is easily scalable for all variations of AI Processors and System SoC.”
The AI Designer enables an architect to rapidly construct a model by configuring the IP and assembling the topology in a graphical modeling. The user can run AI workloads and generate traffic on different interfaces. The model can be simulated for task allocation between cores and accelerators, partition the behavior into hardware and software, size the system parameters, trade-off response time and power consumption, select the scheduler for the neural network, and manage the queues and flow control. The combination of the large model capacity, fast model construction, extremely fast simulator, and analytics engine, enables users to arrive at the most suitable architecture very quickly for the target application.
Users can run software on the target architecture to view the expected response times, network throughput, cache hit-ratio, and memory bandwidth. The VisualSim AI enables companies to optimize and validate the SoC system specification, and at the same time allows system companies to select the right SoC for their target application. To arrive at the final specification, the designer can validate all assumptions, resolve system bottlenecks and eliminate surprises before integration. A number of beta customers have utilized this platform to design AI SoC for the data center and automotive applications. Other applications targeted for this platform include autonomous driving, radars’ processing, defense systems, flight avionics, medical instruments, high performance computing and infotainment systems.
Availability
VisualSim AI designers have tested for accuracy the task latency and power consumption on multiple projects. The platform works on VisualSIm version 2140b. OS supported includes Windows, Linux and Mac OS. To learn more, attend a private session in Booth 2441 at Design Automation Conference 2021 in San Francisco by registering at https://calendly.com/mirabilisdesign/dac or contact Mirabilis Design at Email Contact.
About Mirabilis Design
Mirabilis Design is a Silicon Valley software company, providing software ssolutions to identify and eliminate risk in the product specification, accurately predicting the human and time resources required to develop the product, and improve communication between diverse engineering teams. VisualSim Architect combines Intellectual Property, system-level modeling, simulation, environment analysis and application templates to significantly improve model construction, simulation, analysis and RTL verification. The environment enables designers to rapidly converge to a design which meets a diverse set of interdependent time and power requirements. It is optimally used very early in the design process in parallel with (and as an aid to) the development of the product’s written specification and long before an implementation (for example, RTL, software code, or schematic) of that product can even be started.
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Trademarks
Mirabilis Design, VisualSim and Mirabilis Design logo are trademarks of Mirabilis Design Inc.
Editorial Contact
Mohan Santhanam
Mirabilis Design Inc.
Email: mohans@mirabilisdesign.com