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Analog/Mixed Signal Lunch Panel at the 59th DAC

Accellera at the 59th Design Automation Conference

Luncheon Panel: "AMS language standards for Design and Verification: Standing still or moving forward?"

Tuesday July 12, 2022
11:45am-1:00pm 
Moscone West Room 3024

Register here

Accellera invites you to a luncheon and panel discussion focused on the current state of analog/mixed-signal standards, the challenges, and the opportunities. Martin Barnasconi, Accellera’s Technical Committee Chair, will also provide a brief update on Accellera.

Panel Abstract:
In many application domains such as Communications, Automotive, Biomedical, Aerospace, and Industrial, a solid understanding of analog/RF and mixed-signal concepts is vital to design and verify high-quality and robust products. Furthermore, the integration of digital and software technologies in analog- and RF-centric products requires a careful review of the applicability of today’s mixed-signal design, modeling, verification methodologies, flows, and the available tools and languages.

Are today’s AMS language standards sufficient to keep up with the industry needs? What else is required?

The AMS panel will feature industry experts that can shed light on the challenges and opportunities in the mixed-signal design and verification domain and discuss the ongoing standards developments in Accellera on UVM-AMS, SystemC-AMS, and SystemVerilog-AMS as well as available IEEE standards such as SystemVerilog and VHDL-AMS. Panelists will also share their insights into what needs to happen in addition to these initiatives to further advance the mixed-signal design and verification domain.

Have a question for our panelists on AMS standards? We welcome them in advance, and panelists will do their best to address them during the panel discussion.  Submit your questions here.

Panelists include: Nagu Dhanwada, IBM; Martin Barnasconi, NXP and Accellera Technical Committee Chair; Peter Grove, Renesas; Lakshmanan Balasubramanian, Texas Instruments; Xiang Li, Qualcomm. The panel will be moderated by Tom Fitzpatrick, Accellera UVM-AMS Working Group Chair.

The Accellera-sponsored luncheon is free to DAC attendees, but  registration is required.

About Accellera

Accellera Systems Initiative is an independent, not-for-profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit  www.accellera.org. Find out more about  membership. Follow @accellera on Twitter and LinkedIn or to comment, please use #accellera. Accellera Global Sponsors are Cadence, Siemens EDA, and Synopsys.

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Accellera and Accellera Systems Initiative are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.

For more information, contact:

Barbara Benjamin
Public Relations for Accellera Systems Initiative
Phone: +1 503 209 2323
Email: Email Contact